1. Field of the Invention
The present invention relates to the field of semiconductor packaging, and more particularly, to 3-D semiconductor packaging.
2. Description of the Related Art
In the initial step of the conventional method for making a semiconductor package, the substrate provided by the wafer foundry may have various undesirable characteristics. For example, the size of the pad may be too small or there may have too many different circuits, metal layers, and dielectric layers existing and hindering the formation of conductive vias in the substrate. In particular, it may be difficult to apply a via-last process to etch through the substrate from a backside surface of the wafer to reach the original pad.